A silicon single crystal wafer used as a substrate of a semiconductor integrated circuit device has mainly been produced by Czochralski method (CZ method). CZ method is a method that a seed crystal of silicon single crystal is immersed to a silicon melt melted in a quartz crucible at a high temperature of 1420° C. or more, the seed crystal is gradually pulled along with rotating the quartz crucible and the seed crystal, and thereby a columnar silicon single crystal is grown. At this time, a surface of the quartz crucible being in contact with the silicon melt is melted and oxygen is dissolved into the silicon melt and taken in the crystal during the growth. The oxygen atoms aggregate during the crystal growth and the cooldown to be oxygen precipitation nuclei. Therefore, if a silicon wafer obtained from the crystal grown as it is is subjected to heat treatment in a temperature zone from 700° C. to 1050° C., the nuclei are grown to form oxide precipitates and BMDs. The oxide precipitates have a beneficial role of capturing metal contamination caused by processes of integrated circuit device formation (device processes). This is so-called intrinsic gettering (IG).
That is, in the device processes, there is heavy-metal contamination as represented by Fe, Ni, and Cu in a heat-treating process at a high temperature and so forth. If by such heavy-metal contamination, defects or electrical levels are formed in the vicinity of a surface of the wafer, device characteristic is degraded. Therefore, because it is necessary that the heavy-metal contamination is removed from the vicinity of the wafer surface, there has been conventionally used a gettering technique of IG or various types of EG (Extrinsic Gettering). In particular, in the future device process, it is clear that still higher integration and temperature lowering of processes by using high-energy ion implantation will be promoted. In that case, it is anticipated that because of the temperature lowering of processes, it becomes difficult that BMDs are formed during the device processes. Therefore, in a low temperature process, it becomes more difficult to obtain sufficient IG effect than that in a high temperature process. Moreover, even if device processes are lowered in the temperature, it is difficult to avoid heavy-metal contamination by high-energy ion implantation and such, and therefore gettering technique is thought to be essential. Moreover, it is preferable that BMDs exist at high density for preventing generation of slip.
A general BMD formation has been performed by processing a silicon single crystal into wafers and then subjecting the wafers to heat treatment. For example, heat treatment referred to as DZ-IG heat treatment or the like is known. This is that by subjecting a wafer processed mirror-like to high-temperature treatment at a temperature of about 1100° C. to 1200° C., oxygen in the vicinity of the wafer surface is outward diffused to reduce interstitial oxygen to be nuclei of micro defects, and thereby a defect-free DZ (Denuded Zone) layer is formed in a device active region. Thereafter, BMDs are formed in the bulk of the wafer by low-temperature heat treatment at 600° C. to 900° C. As described above, two heat treatment steps of the high-temperature+the low temperature have been performed. Moreover occasionally, BMDs may be sufficiently formed first by performing low-temperature treatment, and then a DZ layer of the wafer surface may be formed by high-temperature heat treatment. Such a wafer in which a DZ layer and IG capability are given by performing heat treatment in a state of a wafer is referred to as an annealed wafer or the like.
On the other hand, in a silicon single crystal grown by CZ method, oxygen impurities are generally contained as described above. If the crystal as it is is used for device-producing processes, supersaturated oxygen is occasionally precipitated during the processes. There are some cases that the oxide precipitates secondarily cause dislocations, stacking faults, or the like, by strain due to expansion of volume. Such oxide precipitates and the secondary defects thereof have a great effect on characteristics of semiconductor device. Therefore, in the case that such defects exist in the wafer surface and the device active layer, there is occasionally caused increase of leakage current, fault of oxide dielectric breakdown voltage, or the like.
Moreover, as devices come to have higher integration and become finer, Grown-in defects introduced in pulling a silicon single crystal by CZ method, which haven't been historically seen as a problem, significantly degrade oxide dielectric breakdown voltage characteristic. Therefore, whether crystallinity in the vicinity of a surface of a silicon single crystal substrate is good or bad comes to have a great impact on reliability and process yield of the device.
As a measure against that, there is a technique that a wafer is subjected to heat treatment to annihilate defects on the wafer surface. As the heat treatment of a wafer, there is a method that a silicon substrate is heated in a hydrogen atmosphere or in an atmosphere containing hydrogen at 950° C. to 1200° C. for 5 minutes or more and thereby a DZ layer is formed in a silicon wafer surface part by promotion of oxygen out-diffusion, (see, for example, Japanese Patent Application Laid-open (kokai) No. 60-231365, No. 61-193456, and No. 61-193458).
Moreover, in recent years, it has been devised that nitrogen is doped in a wafer (ingot) and thereby defects originating in crystal such as COP (Crystal Originated Particle) are easily annihilated and oxide precipitates can be easily obtained. Thereby, it has become possible that annealed wafers with a wide defect-free region are effectively produced. Moreover, it has been possible that high-quality wafers are produced effectively in the case that after-mentioned epitaxial wafers are produced using such substrates.
Furthermore, there is known a crystal consisting of a region having excess atomic vacancies but no defects introduced during crystal growth (defects such as COP) and a region having excess interstitial silicon atoms but no defects introduced during crystal growth. This can be obtained by controlling pulling rate of a crystal and such, and can be wafers having very few crystal defects. Such a crystal consisting of a region having excess atomic vacancies but no defects introduced during crystal growth, and a region having excess interstitial silicon atoms but no defects introduced during crystal growth is referred to as nearly perfect crystal, hereinafter occasionally referred to as NPC. Also, using such a crystal, annealed wafers each having a wide defect-free region can be produced effectively (see, for example, Japanese Patent Application Laid-open (kokai) No. 11-199387). Moreover, if epitaxial growth is performed on the wafer that such a crystal is used, high-quality wafers can be produced effectively.
However, annealing as described above, which is referred to as DZ-IG heat treatment, requires much time because a wafer is subjected to two-step heat treatment having the different purposes of DZ layer formation and BMD formation. In particular, for forming BMDs at high density, it is necessary to subject a wafer to heat treatment at a low temperature for a sufficient time.
In the case that heat treatment is performed in a wafer state processed into a silicon wafer, a vertical heat treatment apparatus 30 is used as shown in FIG. 6, wafers W set in a heat treatment boat 40 are heated in a chamber 31 by a heater 32. Moreover, for setting the wafers, the heat treatment boat 40 is used as shown in FIG. 7, and wafers W are held in groove like wafer-placed parts 43 provided in a plurality of columns 42 connected by connection parts 41. However, the number of wafers able to be set therein is limited to at most about one hundred. Therefore, for producing annealed wafers in large quantity, it is necessary that many heat treatment apparatuses are prepared or annealing time is shortened.
However, as a wafer has a larger diameter, such an apparatus for performing heat treatment also becomes larger and a heat treatment boat used for it and such also become larger, and thus very expensive apparatuses become required in terms of equipment. Therefore, there is cost limitation for introducing many apparatuses, it is more important to effectively operate a heat treatment apparatus.
On the other hand, nowadays, an epitaxial wafer in which a single crystal layer is grown on its surface is occasionally used. There is an advantage that an epitaxial wafer has good crystallinity in the vicinity of the surface thereof. Moreover, according to the technique of epitaxial growth, it can be performed with relative ease that a sharp gradient of impurity concentration is formed inside a wafer or a layer with low concentration is formed inside a layer with high concentration. Therefore, an epitaxial wafer is an essential wafer for fabricating a bipolar transistor or a schottky barrier diode. In formation of such an epitaxial wafer, a high-temperature process at 1000° C. or more is performed.
The above-mentioned high-temperature process at 1000° C. or more includes the epitaxial growth in itself and a pretreatment performed before the epitaxial growth. The epitaxial growth of a silicon crystal thin film is typically performed by supplying a silicon compound gas such as SiCl4, SiHCl3, SiH2Cl2, or SiH4 and a dopant gas such as B2H6 or PH3 in H2 atmosphere in a temperature zone of 1000 to 1200° C.
On the other hand, the pretreatment is an operation for removing a native oxide film and particles which exist on a surface of the silicon single crystal substrate. In particular, before the epitaxial growth is performed, cleaning of the surface of the silicon single crystal substrate is an essential treatment. A method occasionally used for removing a native oxide film and particles is that of subjecting the substrate to heat treatment in a gas of H2 or a mixed gas of H2/HCl at a high temperature near 1100° C. Otherwise, as methods that are practicable near a room temperature, wet etching using a dilute solution of hydrofluoric acid, combination of a hydrofluoric gas and a water vapor, and Ar plasma treatment are known. However, there are problems such as regrowth of an oxide film immediately after the treatment, occurrence of surface roughness of a substrate, and corrosion of treatment equipment. Therefore, it is thought that the high-temperature treatment described above is most appropriate as it is now.
However, as for an epitaxial wafer as described above, there are some cases that gettering effect is not sufficient. This is because a substrate to be an epitaxial wafer goes through a high-temperature process of 1000° C. or more, almost all of oxygen precipitation nuclei and oxide precipitates are annihilated and gettering function comes not to be accomplished. In a conventional method, by the pretreatment before the epitaxial growth, it is difficult to sufficiently remove a native oxide film in a temperature zone of less than 1000° C. Therefore, the pretreatment cannot help but being performed in a temperature zone of 1000° C. or more. Accordingly, it was impossible to avoid lowering of gettering efficiency of an epitaxial wafer, conventionally.
In order to obtain gettering effect for such a substrate, it has been necessary that heat treatment for forming BMDs is performed before or after forming an epitaxial layer, and much time has been spent. In particular, in order to form the requisite BMDs for obtaining gettering effect, it is necessary to subject a wafer to heat treatment at a low temperature for a sufficient time.